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Single-Event Performance of Sense-Amplifier Based Flip-Flop Design in a 16-nm Bulk FinFET CMOS Process
₹4,500.00

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Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design
₹4,500.00

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Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design
₹4,500.00

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Timing Error Tolerance in Small Core Designs for SoC Applications
₹5,500.00

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Two 122-GHz Phase-Locked Loops in 65-nm CMOS Technology
₹5,500.00

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Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design
₹4,500.00

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Variation Tolerant Differential 8T SRAM Cell for Ultralow Power Applications
₹5,500.00

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VLSI Architecture for delay efficient 32-bit Multiplier using Vedic Mathematic sutras
₹5,500.00

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VLSI Implementation of a Cost-Efficient Micro Control Unit With an Asymmetric Encryption for Wireless Body Sensor Networks
₹4,500.00

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Wide-Range Adaptive RF-to-DC Power Converter for UHF RFIDs
₹5,500.00

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“High throughput Pipelined 2d Discrete Cosine Transform” for Video Compression
₹5,500.00

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