Low-Power Digital Signal Processor Architecture for Wireless Sensor Nodes
Product Description
Abstract—Radio communication exhibits the highest energy consumption in wireless sensor nodes. Given their limited energy supply from batteries or scavenging, these nodes must trade data communication for on-the-node computation. Currently, they are designed around off-the-shelf low-power microcontrollers. < Final Year Projects > But by employing a more appropriate processing element, the energy consumption can be significantly reduced. This paper describes the design and implementation of the newly proposed folded-tree architecture for on-the-node data processing in wireless sensor networks, using parallel prefix operations and data locality in hardware. Measurements of the silicon implementation show an improvement of 10-20× in terms of energy as compared to traditional modern micro-controllers found in sensor nodes.
Video
View Demo
Including Packages
Our Specialization
Support Service
Statistical Report
satisfied customers
3,589
Freelance projects
983
sales on Site
11,021
developers
175+
Reviews
There are no reviews yet.