Showing 1–12 of 1939 results
A Novel Joint Data-Hiding and Compression Scheme Based on SMVQ and Image Inpainting Abstract?A Novel Joint Data-Hiding and Compression Scheme Based on SMVQ and Image Inpainting. In this paper, we propose a novel joint data-hiding and compression scheme for digital images using side match vector quantization (SMVQ) and image inpainting. The two functions of data…
1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS Abstract?A phase-dependent gain-transition correlated double-sampling technique is proposed and applied to a 10-bit 75-MS/s pipelined analog-to-digital converter.< Final Year Projects > This reduces the accumulation of predictive error of each multiplying digital-to-analog converter stage due to the finite gain of the operational amplifiers, without…
11.25-ms-Group-Delay and Low-Complexity Algorithm Design of 18-BandQuasi-ANSIS1.111/3 Octave Digital Filterbank for Hearing Aids Abstract?11.25-ms-Group-Delay and Low-Complexity Algorithm Design of 18-Band Quasi-ANSI S1.11 1/3 Octave Digital Filterbank for Hearing Aids. A novel algorithm and architecture design for 18-band quasi-class-2 ANSI S1.11 1/3 octave ?lter bank. The proposed design has several advantages such as lower group delay,…
2.5 GB/s hybrid WDM/TDM PON using radio over ?ber technique Abstract? 2.5 GB/s hybrid WDM/TDM PON using radio over ?ber technique. Hybrid gigabit-passive optical network (GPON) is a hybrid passive optical network, where wavelength division multiplexing (WDM) GPON and time division multiplexing (TDM)-GPON are integrated into a single passive optical network, reducing cost and increasing…
3-D Adaptive Sparsity Based Image Compression With Applications to Optical Coherence Tomography Abstract? We present a novel general-purpose compression method for tomographic images, termed 3D adaptive sparse representation based compression (3D-ASRC). We focus on applications of 3D-ASRC for the compression of ophthalmic 3D optical coherence tomography (OCT) images. The 3D-ASRC algorithm exploits correlations among adjacent…
3-D Face Recognition Under Occlusion Using Masked Projection Abstract?With advances in sensor technology, the three-dimensional (3-D) face has become an emerging biometric modality, preferred especially in high security applications. However, dealing with occlusions covering the facial surface is a great challenge, which should be handled to enable applicability to fully automatic security systems. In this…
A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs Abstract?A low-voltage low-power CMOS sub-threshold voltage reference with no resistors and no bipolar junction transistors in a wide temperature range. The temperature stability is improved by second-order compensation. By employing a bulk-driven technique and the< Final Year Projcts 2016 > MOS transistors…
A 16 Kb Spin-Transfer Torque Random Access Memory With Self-Enable Switching and Precharge Sensing Schemes Abstract?Spin-transfer torque magnetic random access memory (STT-MRAM) is considered one of the most promising non-volatile memory candidates thanks to its excellent performance in terms of access speed, endurance, and compatibility to CMOS. However, high power supply voltage is required in…
A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme Abstract? A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme. A 3.5 GS/s 6-bit current-steering digital-to-analog converter DAC with auxiliary circuitry to assist testing in a 1 V digital 28-nm CMOS process. The DAC…
A 2D Discrete Wavelet Transform Based 7- State Hidden Markov Model for Efficient Face Recognition Abstract? A 2D Discrete Wavelet Transform Based 7- State Hidden Markov Model for Efficient Face Recognition. Video View Demo [numbers_sections number=”1″ title=”Including =Packages=” last=”no” ] Complete Source Code Complete Documentation Complete Presentation Slides Flow Diagram Database File Screenshots Execution Procedure…
A 6 b 5 GS/s 4 Interleave d 3 b/Cycle SAR ADC Abstract?This paper presents a 4? time-interleaved 6-bit 5 GS/s 3 b/cycle SAR analog-to-digital converter (ADC). Hardware overhead induced by a 3 b /cycle architecture is eased by an interpolation technique where around 1/3 of the hardware is saved. In addition, complicated switching controls…
A 65 nm Cryptographic Processor for High Speed Pairing Computation Abstract? A 65 nm Cryptographic Processor for High Speed Pairing Computation. Pairings are attractive and competitive cryptographic primitives for establishing various novel and powerful information security schemes. This paper presents a ?exible and high-performance processor for cryptographic pairings over pairing-friendly curves at high security levels….
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