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Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC
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Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications
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Area-Delay-Power Efficient Carry-Select Adder
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Area-Delay-Power Efficient Fixed-Point LMS Adaptive Filter With Low Adaptation-Delay
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Area-Delay-Power Efficient Fixed-Point LMSAdaptive Filter With Low Adaptation-Delay
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ART: An Attack-Resistant Trust Management Scheme for Securing Vehicular Ad Hoc Networks
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Article Search Engine
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Artificial bee colony algorithm for solving multi-objective optimal power flow problem
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Artificial Intelligence-Based Student Learning Evaluation: A Concept Map-Based Approach for Analyzing a Student’s Understanding of a Topic
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Artificial-Neural-Network-Based Phase-Locking Scheme for Active Power Filters
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ASIC and FPGA Implementation of the Gaussian Mixture Model Algorithm for Real-Time Segmentation of High Definition video
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ASRQ: Automatic Segment Repeat Request for IEEE 802.15.4-Based WBAN
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