Area and Energy-Efficient Complementary Dual-Modular Redundancy Dynamic Memory for Space Applications
Abstract– In the first place, the limited size and power budgets of space-bound systems often contradict the requirements for reliable circuit operation within high-radiation environments. Here the smallest solution for soft-error tolerant embedded memory yet to be presented. In addition, complementary dual-modular redundancy (CDMR) memory is based on a four-transistor dynamic memory core that internally stores complementary data values to provide an inherent per-bit error detection capability.In addition, simple low-overhead parity, an error-correction capability is added to the memory architecture for robust soft-error protection. The proposed memory was implemented in a 65-nm CMOS technology, displaying as much as a 3.5 × smaller silicon footprint than other radiation-hardened bitcells. In the Final Analysis, the CDMR memory consumes between 48% and 87% less standby power than other considered solutions across the entire operating region.
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