“An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation” has been added to your cart. Continue shopping Cart Summary Remove item Thumbnail image Product Price Quantity Subtotal Use GET20OFF coupon code to get 20% off on minimum order above $100GET20OFF × Distributed Progressive Algorithm for Maximizing Lifetime Vector in Wireless Sensor Networks ₹4,500 Distributed Progressive Algorithm for Maximizing Lifetime Vector in Wireless Sensor Networks quantity ₹4,500 × Unified Opportunistic Scheduling for Layered Multicast over Cognitive Radio Networks ₹5,500 Unified Opportunistic Scheduling for Layered Multicast over Cognitive Radio Networks quantity ₹5,500 × An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs ₹4,500 An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs quantity ₹4,500 × QoS-aware Node Selection Algorithm for Routing Protocols in VANETs ₹4,500 QoS-aware Node Selection Algorithm for Routing Protocols in VANETs quantity ₹4,500 × Fine-Grained Two-Factor Access Control for Web-Based Cloud Computing Services ₹4,500 Fine-Grained Two-Factor Access Control for Web-Based Cloud Computing Services quantity ₹4,500 × Sum capacity maximization for MIMO?OFDMA based cognitive radio networks ₹3,500 Sum capacity maximization for MIMO?OFDMA based cognitive radio networks quantity ₹3,500 × An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation ₹4,500 An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation quantity ₹4,500 Coupon: Apply coupon Update cart Cart totals Subtotal ₹31,500 Total ₹31,500 Proceed to checkout Visa CardMasterCardAmerican ExpressDiscover CardPayPalApple PayGuaranteed Safe And Secure Checkout