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0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier
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5,500.00
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10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage
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4,500.00
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28-nm Latch-Type Sense Amplifier Modification for Coupling Suppression
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4,500.00
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75 GBd InP-HBT MUX-DAC module for high-symbol-rate optical transmission
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5,500.00
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A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18 μ m CMOS Technology for Implantable Medical Applications
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5,500.00
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A 32 kb 0.35–1.2 V, 50 MHz–2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS
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4,500.00
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A 900-MHz, 3.5-mW, 8-bit Pipelined Subranging ADC Combining Flash ADC and TDC
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4,500.00
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A CMOS Ultrawideband Pulse Generator for 3–5 GHz Applications
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4,500.00
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A Compact One-Pin Mode Transition Circuit for Clock Synchronization in Current-Mode- Controlled Switching Regulators
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5,500.00
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A Compact-Area Low-VDDmin 6T SRAM With Improvement in Cell Stability, Read Speed, and Write Margin Using a Dual-Split-Control-Assist Scheme
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4,500.00
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A Configurable Parallel Hardware Architecture for Efficient Integral Histogram Image Computing
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5,500.00
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A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic
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5,500.00
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