Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing
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Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing
Abstract— Trigger-Wave Asynchronous Cellular Logic Array for Fast Binary Image Processing. The design and the VLSI implementation of an asynchronous cellular logic array for fast binary image processing. The proposed processor array employs trigger wave propagation and collision detection mechanisms for binary image skeletonization, and Voronoi tessellation.< Final Year Project 2016 > Low power, low area, and high processing speed are achieved using full custom dynamic logic design. The prototype array consisting of 64 × 96 cells is fabricated in a standard 90 nm CMOS technology. The experimental results confirm the fast operation of the array, capable of extracting up to 2.78 X 106 skeletons per second, consuming less than 1 nJ/skeleton.
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