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Home / programming language / Online Matlab Projects / Relaxed Min-Max Decoder Architectures for Nonbinary Low-Density Parity-Check Codes
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Relaxed Min-Max Decoder Architectures for Nonbinary Low-Density Parity-Check Codes

2.13 out of 5 based on 24 customer ratings
(24 customer reviews )
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SKU: PROJ1761 Categories: Parallel and Distributed Projects, Final Year Projects, 2013 Projects, 2014 Projects, Online Matlab Projects Tags: academic projects, Android project 2013-2014, Android project Abstract, Android project list, btech projects, dotnet project 2013-2014, dotnet project Abstract, dotnet project list, Final Year Projects, ieee abstracts, ieee paper download, ieee projects 2013, ieee projects 2013 paper list, ieee projects 2013-2014, ieee projects 2014, ieee projects 2014 paper list, ieee projects 2015, ieee projects 2015 paper list., ieee titles, java project list, java projects 2013-2014, java projects Abstract, madurai software company, matlab project 2013-2014, matlab project Abstract, matlab project list, mtech projects, phd research work, Php project 2013-2014, Php project Abstract, Php project list, Power Electronic project 2013-2014, Power Electronic project Abstract, Power Electronic project list, project center Bangalore, project center chennai, project center coimbatore, project center Erode, project center Hyderabad, project center Kollam, project center madurai, project center Pandicherry, project center ramnad, project center Salem, project center Tiruneveli, project center trichy, research center, Students Projects, Vlsi project 2013-2014, Vlsi project Abstract, Vlsi project list
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Relaxed Min-Max Decoder Architectures for Nonbinary Low-Density Parity-Check Codes. Compared to binary low-density parity-check (LDPC) codes, nonbinary (NB) LDPC codes can achieve higher coding gain when the codeword length is moderate, but at the cost of higher decoding complexity. One major bottleneck of NB-LDPC decoding is the complicated check node processing. In this paper, a novel relaxed check node processing scheme is proposed for the min-max NB-LDPC decoding algorithm. Each finite field element of GF(2p) can be uniquely represented by a linear combination of p independent field elements. Making use of this property, an < Final Year Project > innovative method is developed in this paper to first find a set of the p most reliable variable-to-check messages with independent field elements, called the minimum basis. Then, the check-to-variable messages are efficiently computed from the minimum basis. With very small performance loss, the complexity of the check node processing can be substantially reduced using the proposed scheme. In addition, efficient VLSI architectures are developed to implement the proposed check node processing and the overall NB-LDPC decoder. Compared to the most efficient prior design, the proposed decoder for a (837, 726) NB-LDPC code over GF(25) can achieve 52% higher efficiency in terms of throughput-over-area ratio.

Abstract—Relaxed Min-Max Decoder Architectures for Nonbinary Low-Density Parity-Check Codes.

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Rated 2.13 out of 5 stars
24 reviews
5 stars 0 0 %
4 stars 6 25 %
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