Fixed-Point Computing Element Design for Transcendental Functions and Primary Operations in Speech Processing

Abstract— A fixed-point architecture based on a reconfigurable scheme for integrating several commonly used mathematical operations of speech signal processing. The proposed design can perform two transcendental mathematical operations called logarithm and powering, and three commonly used computations with similar operations named polynomial calculation, filtering, and windowing. By analyzing the adopted algorithms of the above five operations, a simplified computing unit is designed. This unit can combine six types of operations by reconfiguring the data paths, and the same multiply– add architecture can be reused for reducing the redundant usage of logic gates. The experimental results reveal that the proposed design can work at a 200-MHz clock rate, and its gate count only has 11.9k. Compared with the results of the floating-point function, the median errors of the proposed design for computing the powering and logarithmic functions are 0.57% and 0.11%, respectively. Such results indicate that this simple architecture can be effectively used in most speech processing applications. With respect to the related studies, Ramamoorthy et al first noticed the suitable priorities of the Newton–Raphson method (NRM) for computing the square-root operations. In this brief, a finding was discovered that the division in the recursion of the NRM could be removed, when the target function of the NRM changed to the inverse square root. Auger et al. [8] developed a multiplier-free algorithm based on a dichotomous coordinate descent (DCD)technique for the solutions of division, square root, and logarithmic operations. The DCD-based algorithm included only additions, shift operations, and logic conditions. Such an algorithm was very proper to design a relevant low-gate-count architecture. < final year projects >