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VLSI
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A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits
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A Simple FPGA System for ECG R-R Interval Detection
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A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell
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A Synergetic Use of Bloom Filters for Error Detection and Correction
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A Thermal Energy Harvesting Power Supply With an Internal Startup Circuit for Pacemakers
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Achieving Memory Access Equalization via Round-trip Routing Latency Prediction in 3D Many-core NoCs
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Achieving Optimal Efficiency in Energy Transfer to a CMOS Fully Integrated Wireless Power Receiver
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Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks
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Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications With Convolutional Codes
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All Digital Energy Sensing for Minimum Energy Tracking
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An 8-bit 100-GS/s Distributed DAC in 28-nm CMOS for Optical Communications
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An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs
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