VLSI

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Sliced Message Passing: High Throughput Overlapped Decoding of High-Rate Low-Density Parity-Check Codes
₹4,500.00

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Smart Reliable Network-on-Chip
₹4,500.00

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Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design
₹4,500.00

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Stable, Reliable and Bit-Interleaving 12T SRAM for Space Applications: A Device Circuit Co-design
₹4,500.00

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Star-Type Architecture with Low Transmission Latency for a 2D Mesh NOC
₹4,500.00

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Subthreshold Dual Mode Logic
₹4,500.00

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Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories
₹4,500.00

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Test Compaction by Sharing of Transparent-Scan Sequences Among Logic Blocks
₹4,500.00

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The LUT-SR Family of Uniform Random Number Generators for FPGA Architectures
₹4,500.00

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Threshold Logic Computing: Memristive-CMOS Circuits for Fast Fourier Transform and Vedic Multiplication
₹4,500.00

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Thwarting Scan-Based Attacks on Secure-ICs With On-Chip Comparison
₹4,500.00

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Timing Error Tolerance in Small Core Designs for SoC Applications
₹5,500.00

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