“Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC” has been added to your cart. Continue shopping Cart Summary Remove item Thumbnail image Product Price Quantity Subtotal Use GET20OFF coupon code to get 20% off on minimum order above $100GET20OFF × SIR: a secure and intelligent routing protocol for vehicular adhoc network ₹4,500 SIR: a secure and intelligent routing protocol for vehicular adhoc network quantity ₹4,500 × User-Centric Energy Efficiency Maximization for Wireless Powered Communications ₹5,500 User-Centric Energy Efficiency Maximization for Wireless Powered Communications quantity ₹5,500 × Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC ₹5,500 Architecture of a Reusable BIST Engine for Detection and Autocorrection of Memory Failures and for IO Debug, Validation, Link Training, and Power Optimization on 14-nm SoC quantity ₹5,500 Coupon: Apply coupon Update cart Cart totals Subtotal ₹15,500 Total ₹15,500 Proceed to checkout Visa CardMasterCardAmerican ExpressDiscover CardPayPalApple PayGuaranteed Safe And Secure Checkout