0.7-V Three-Stage Class-AB CMOS Operational Transconductance Amplifier Abstract? A simple high-performance architecture for bulk-driven operational transconductance amplifiers (OTAs) is presented. The solution, suitable for operation under sub 1-V single supply, is made up of three gain stages and, as an additional feature, provides inherent class-AB behavior with accurate and robust standby current control. < final...
Stochastic Resource Provisioning for Container ized Multi-Tier Web Ser vices in Clouds Abstract-Under today?s bursty web traffic, the fine-grained per-container control promises more efficient resource provisioning for web services and better resource utilization in cloud datacenters. In this paper, we present Two-stage Stochastic Programming Resource Allocator (2SPRA). It optimizes resource provisioning for containerized n-tier web…
1 Stochastic Resource Provisioning for Container ized Multi-Tier Web Ser vices in Clouds Abstract-Under today?s bursty web traffic, the fine-grained per-container control promises more efficient resource provisioning for web services and better resource utilization in cloud datacenters. It optimizes resource provisioning for containerized n-tier web services in accordance with fluctuations of incoming workload to accommodate…
10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage Abstract– We present, in this paper, a new 10T static random access memory cell having single ended decoupled read-bitline (RBL) with a 4T read port for low power operation and leakage reduction. The RBL is precharged…
28-nm Latch-Type Sense Amplifier Modification for Coupling Suppression Abstract-With the development of modern semiconductor fabrication technology, the channel length of the CMOS device and the device pitch continually shrink accompanied by more and more severe process variation and signal coupling effect, respectively. In this paper, we explain how the coupling effect interferes with the action…
3D Brain Atlas Reconstruction Using Deformable Medical Image Registration: Application to Deep Brain Stimulation Surgery Abstract?In deep brain stimulation surgery the most important step is the correct location of the neurostimulator device. Here, the medical specialist needs to robustly locate the basal ganglia area (i.e. subthalamic nucleus) to implant the neurostimulator. 3D brain atlas reconstruction…
75 GBd InP-HBT MUX-DAC module for high-symbol-rate optical transmission Abstract? Owing to the spread of broadband applications, data traffic in optical communication networks is continuously increasing. High-symbol-rate optical transmission schemes with advanced multi-level modulation formats, such as M-ary quadrature amplitude modulation (QAM), are now being investigated as to their suitability for future cost-effective 1 Tb/s-class…
A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18 ? m CMOS Technology for Implantable Medical Applications Abstract? A 0.45-V low-power 0.18 ?m CMOS OOK/FSK RF receiver for implantable medical applications is proposed. The re-ceiver utilizes a wake-up mechanism to adjust its power consumption automatically by reading the amplitude of the input wireless OOK/FSK modulated RF…
A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process Abstract?a 14-bit 250 MS/s ADC fabricated in a 180 nm CMOS process, which aims at optimizing its linearity, operating speed, and power efficiency. The implemented ADC employs an improved SHA with parasitic optimized bootstrapped switches to achieve high sampling linearity over a…
A 32 kb 0.35?1.2 V, 50 MHz?2.5 GHz Bit-Interleaved SRAM With 8 T SRAM Cell and Data Dependent Write Assist in 28-nm UTBB-FDSOI CMOS Abstract-An optimized co-design of SRAM cell, assist schemes, and layout is proposed to achieve wide voltage range operation of SRAM from 0.35?1.2 V at all process corners. A differential read asymmetric…
A 40?170 MHz PLL-Based PWM Driver Using 2-/3-/5-Level Class-D PA in 130 nm CMOS Abstract? A high-speed driver that provides a pulsewidth modulated output while using a class-D Power Amplifier (PA) is described. A PLL-based architecture is employed, which eliminates the requirement for a precise ramp or triangular signal generator, and a high-speed comparator, which…
A Bottom-Up Approach for Pancreas Segmentation Using Cascaded Superpixels and (Deep) Image Patch Labeling Abstract? Robust organ segmentation is a prerequisite for computer-aided diagnosis, quantitative imaging analysis, pathology detection, and surgical assistance. For organs with high anatomical variability (e.g., the pancreas), previous segmentation approaches report low accuracies, compared with well-studied organs, such as the liver…
