“An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation” has been added to your cart. Continue shopping “A 6 b 5 GS/s 4 Interleave d 3 b/Cycle SAR ADC” has been added to your cart. Continue shopping Cart Summary Remove item Thumbnail image Product Price Quantity Subtotal Use GET20OFF coupon code to get 20% off on minimum order above $100GET20OFF × Hybrid Clustering Scheme for Drone based Cognitive Internet of Things ₹4,500 Hybrid Clustering Scheme for Drone based Cognitive Internet of Things quantity ₹4,500 × Distributed Progressive Algorithm for Maximizing Lifetime Vector in Wireless Sensor Networks ₹4,500 Distributed Progressive Algorithm for Maximizing Lifetime Vector in Wireless Sensor Networks quantity ₹4,500 × CSR: Classi?ed Source Routing in DHT-Based Networks ₹4,500 CSR: Classi?ed Source Routing in DHT-Based Networks quantity ₹4,500 × Visually Lossless Encoding for JPEG2000 ₹4,500 Visually Lossless Encoding for JPEG2000 quantity ₹4,500 × VMThunder: Fast Provisioning of Large-Scale Virtual Machine Clusters ₹4,500 VMThunder: Fast Provisioning of Large-Scale Virtual Machine Clusters quantity ₹4,500 × An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation ₹4,500 An Efficient VLSI Architecture for Data Encryption Standard and its FPGA Implementation quantity ₹4,500 × A 6 b 5 GS/s 4 Interleave d 3 b/Cycle SAR ADC ₹4,500 A 6 b 5 GS/s 4 Interleave d 3 b/Cycle SAR ADC quantity ₹4,500 Coupon: Apply coupon Update cart Cart totals Subtotal ₹31,500 Total ₹31,500 Proceed to checkout Visa CardMasterCardAmerican ExpressDiscover CardPayPalApple PayGuaranteed Safe And Secure Checkout