Showing 49–60 of 206 results
A Simple and Reliable System to Detect and Correct Setup/Hold Time Violations in Digital Circuits Abstract? a fully digital system to detect and correct setup/hold time violations in digital circuits, is presented. The proposed system benefits from simple, low-power, small-area, and easy-to-modify design. The system is composed of two separate blocks, detector and corrector connected…
A Simple FPGA System for ECG R-R Interval Detection Abstract? The analysis of the electrocardiogram (ECG) signal is used extensively in the diagnosis of different heart diseases. One of the major tasks to be provided is the accurate determination of the QRS complex. Due to its characteristic shape QRS detection in an ECG signal is…
A Single-Ended With Dynamic Feedback Control 8T Subthreshold SRAM Cell Abstract?A novel 8-transistor (8T) static random access memory cell with improved data stability in subthreshold operation is designed. The proposed single-ended with dynamic feedback control 8T static RAM (SRAM) cell enhances the static noise margin (SNM) for ultralow power supply. < final year projects >…
A Synergetic Use of Bloom Filters for Error Detection and Correction Abstract? Bloom ?lters (BFs) provide a fast and ef?cient way to check whether a given element belongs to a set. The BFs are used in numerous applications, for example, in communications and networking. There is also ongoing research to extend and enhance BFs and…
A Thermal Energy Harvesting Power Supply With an Internal Startup Circuit for Pacemakers Abstract? A complete thermal energy harvesting power supply for implantable pacemakers is presented in this paper. The designed power supply includes an internal startup and does not need any external reference voltage. The startup circuit includes a prestartup charge pump (CP) and…
Achieving Memory Access Equalization via Round-trip Routing Latency Prediction in 3D Many-core NoCs Abstract? 3D many-core NoCs are emerging architectures for future high-performance single chips due to its integration of many processor cores and memories by stacking multiple layers. In such architecture, because processor cores and memories reside in different locations (center, corner, edge, etc.),…
Achieving Optimal Efficiency in Energy Transfer to a CMOS Fully Integrated Wireless Power Receiver Abstract? The design and measurement of an inductive link for transferring energy to a fully integrated wireless power receiver. The power receiver design was focused on optimizing each factor that contributes to the link efficiency while its size was constrained to…
Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks Abstract? Algorithm and Architecture for a Low-Power Content-Addressable Memory Based on Sparse Clustered Networks. A low-power content-addressable memory < Final Year Project 2016 > CAM employing a new algorithm for associativity between the input tag and the corresponding address of the output…
Algorithm and Architecture of Configurable Joint Detection and Decoding for MIMO Wireless Communications With Convolutional Codes Abstract? An algorithm and a VLSI architecture of a configurable joint detection and decoding (CJDD) scheme for multi-input multioutput (MIMO) wireless communication systems with convolutional codes. A novel tree-enumeration strategy is proposed such that the MIMO detection and decoding…
All Digital Energy Sensing for Minimum Energy Tracking Abstract? Minimizing energy consumption is of utmost importance in an energy starved system with relaxed performance requirements. This brief presents a digital energy sensing method that requires neither a constant voltage reference nor a time reference. An energy minimizing loop uses this to find the minimum energy…
An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs Abstract? An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs. < Final Year Projects 2016 > we present a new 8T design for static random access memory (SRAM) cell that is based on traditional Si technology and reduces leakage power…
An Active Marchand Balun and Its Application to a 24-GHz CMOS Mixer Abstract? A fully integrated 24-GHz Gilbert-cell mixer incorporating two on-chip Marchand baluns to convert single-ended signals into differential signals is presented. One is a passive balun at local oscillator (LO) port to improve isolation between the LO and radio-frequency (RF) ports, and the…
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