A CMOS High-Voltage Transmitter IC forUltrasound Medical Imaging Applications Abstract-A CMOS High-Voltage Transmitter IC forUltrasound Medical Imaging Applications. A high-voltage (HV) transmitter integrated circuit for ultrasound medical imaging applications is implemented using 0.18-?m bipolar/CMOS/DMOS technology. The proposed HV transmitter achieves high integration by only employing standard CMOS transistors in a stacked configuration with dynamic gate…
A Directional-Edge-Based Real-Time Object Tracking System Employing Multiple Candidate-Location Generation Abstract-A Directional-Edge-Based Real-Time Object Tracking System Employing Multiple Candidate-Location Generation. We present a directional-edge-based object tracking system based on a field-programmable gate array (FPGA) that can process 640 ? 480 resolution video sequences and provide the location of a predefined object in real time. Inspired…
A Flexible Fully Hardwired CABAC Encoderfor UHDTV H.264/AVC High Profile Video Abstract– A Flexible Fully Hardwired CABAC Encoderfor UHDTV H.264/AVC High Profile Video. In this paper, a flexible CABAC encoder architecture for H.264/AVC encoder applications up to UHDTV (7680?4320) resolution is proposed. Stages of CABAC encoding are analyzed and a generalized CABAC architecture is designed….
A High Speed Low Power CAM With a Parity Bit andPower-Gated ML Sensing Abstract-A High Speed Low Power CAM With a Parity Bit andPower-Gated ML Sensing. Content addressable memory (CAM) offers high-speed search function in a single clock cycle. Due to its parallel match-line (ML) comparison, CAM is power-hungry. Thus, < Final Year Projects >…
A Low-Complexity Turbo Decoder Architecture forEnergy-Efficient Wireless Sensor Networks Abstract-A Low-Complexity Turbo Decoder Architecture forEnergy-Efficient Wireless Sensor Networks. Turbo codes have recently been considered for energy-constrained wireless communication applications, since they facilitate a low transmission energy consumption. However, in order to reduce the overall energy consumption, lookup table-log-BCJR (LUT-Log-BCJR) architectures having a low processing energy…
A New Method for Foetal Electrocardiogram Extraction Using Adaptive Nero-Fuzzy Interference System Trained With PSO Algorithm Abstract? a new method for extracting the Foetal Electrocardiogram < Final Year Projects 2016 > FECG signal form the two ECG signals recorded at the thoracic and abdominal areas of the mother?s skin. The thoracic ECG is assumed to…
A novel approach for automated detection of focal EEG signals using empirical wavelet transform Abstract-In the first place,the determination of epileptogenic area is a prime task in presurgical evaluation. The seizure activity can be prevented by operating the affected areas by clinical surgery. In this paper, an automatic approach has been presented to detect electroencephalogram…
A Novel Signal Modeling Approach for Classification of Seizure and Seizure-free EEG Signals Abstract-This paper presents a signal modeling based new methodology of automatic seizure detection in EEG signals. The proposed method consists of three stages. First, a multirate filterbank structure is proposed that is constructed using the basis vectors of discrete cosine transform (DCT)….
Adaptive Filter Design for ECG Noise Reduction using LMS Algorithm Abstract? The adaptive filters algorithms for removing noise from the Electrocardiogram to receive noise less pure embryo signals. Filtering ECG signals requires a filter which can automatically adapt according to changing input and noise. Adaptive filtering has been used to reduce the noise from the…
An Accurate ECG-Based Transportation Safety Drowsiness Detection Scheme Abstract?Many traffic injuries and deaths are caused by the drowsiness of drivers during driving. Existing drowsi-ness detection schemes are not accurate due to various reasons. < final year projects > [numbers_sections number=”1″ title=”Including =Packages=” last=”no” ] Complete Source Code Complete Documentation Complete Presentation Slides Flow Diagram Database…
An Energy-Efficient L2 Cache Architecture UsingWay Tag Information Under Write-Through Policy Abstract-An Energy-Efficient L2 Cache Architecture UsingWay Tag Information Under Write-Through Policy. Many high-performance microprocessors employ cache write-through policy for performance improvement and at the same time achieving good tolerance to soft errors in on-chip caches. However, write-through policy also incurs large energy overhead due…
An FPGA Architecture Design of Parameter-Adaptive Real-Time Image Processing System for Edge Detection Abstract– An FPGA Architecture Design of Parameter-Adaptive Real-Time Image Processing System for Edge Detection. In this paper we present an FPGA architecture design of parameter-adaptive real-time image processing system for edge detection. The system contains two edge detection algorithms which are suitable…
